We present an efficient and effective method for the detailed routing of symmetrical or sea-of-gates FPGA architectures. Instead of breaking the problem into 2-terminal net collec...
In this paper we study the area and depth trade-off in LUT based FPGA technology mapping. Starting from a depth-optimal mapping solution, we perform a number of depth relaxation o...
— We consider the resource-constrained scheduling of loops with interiteration dependencies. A loop is modeled as a data flow graph (DFG), where edges are labeled with the numbe...
Liang-Fang Chao, Andrea S. LaPaugh, Edwin Hsing-Me...
The Walsh transform has numerous applications in computer-aided design, but the usefulness of these techniques in practice has been limited by the size of the boolean functions th...
Edmund M. Clarke, Kenneth L. McMillan, Xudong Zhao...