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DATE
1997
IEEE
74views Hardware» more  DATE 1997»
13 years 10 months ago
An algorithm for numerical reference generation in symbolic analysis of large analog circuits
Ignacio Garcia-Vargas, Mariano Galan, Francisco V....
DATE
1997
IEEE
58views Hardware» more  DATE 1997»
13 years 10 months ago
On the way to the 2.5 Gbits/s ATM network ATM multiplexer demultiplexer ASIC
J. Riesco, J. C. Diaz, L. A. Merayo, J. L. Conesa,...
DATE
1997
IEEE
58views Hardware» more  DATE 1997»
13 years 10 months ago
Generation of the HDL-A-model of a micromembrane from its finite-element-description
Klaus Hofmann, Manfred Glesner, Nicu Sebe, A. Mano...
DATE
1997
IEEE
88views Hardware» more  DATE 1997»
13 years 10 months ago
VHDL extensions for complex transmission line simulation
This paper proposes extensions to the VHDL grammar and de nes new semantics in the language to model the timing behavior of high frequency buses and clock lines with multiple, dis...
Peter Walker, Sumit Ghosh
ICGA
2007
90views Optimization» more  ICGA 2007»
13 years 5 months ago
Game Over: Black to Play and Draw in Checkers
In 1989, an effort to solve the game of checkers began. It was naïve because of the daunting size of the search space, 5×1020 positions, and because of computer capabilities of ...
Jonathan Schaeffer