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DFT
1998
IEEE
94views VLSI» more  DFT 1998»
13 years 10 months ago
An Integrated HW and SW Fault Injection Environment for Real-Time Systems
This paper describes a system suited to support the Fault Injection process for microprocessor-based embedded systems. The system exploits a low-cost hardware board to monitor the...
Alfredo Benso, Maurizio Rebaudengo, Matteo Sonza R...
DFT
1998
IEEE
78views VLSI» more  DFT 1998»
13 years 10 months ago
A System for Evaluating On-Line Testability at the RT-level
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
Silvia Chiusano, Fulvio Corno, Matteo Sonza Reorda...
TCAD
1998
119views more  TCAD 1998»
13 years 5 months ago
A controller redesign technique to enhance testability of controller-data path circuits
—We study the effect of the controller on the testability of sequential circuits composed of controllers and data paths. We show that even when all the loops of the circuit have ...
Sujit Dey, Vijay Gangaram, Miodrag Potkonjak
DFT
1998
IEEE
84views VLSI» more  DFT 1998»
13 years 10 months ago
Process Variations and their Impact on Circuit Operation
The statistical variations in electrical parameters, such as transistor gain factors and interconnect resistances, due to variations in the manufacturing process are studied using...
Suriyaprakash Natarajan, Melvin A. Breuer, Sandeep...
DFT
1998
IEEE
88views VLSI» more  DFT 1998»
13 years 10 months ago
Characterization of CMOS Defects using Transient Signal Analysis
We present the results of hardware experiments designed to determine the relative contribution of CMOS coupling mechanisms to off-path signal variations caused by common types of ...
James F. Plusquellic, Donald M. Chiarulli, Steven ...