Sciweavers

Share
27 search results - page 1 / 6
» dsd 2010
Sort
View
DSD
2010
IEEE
123views Hardware» more  DSD 2010»
11 years 2 days ago
A Packet Classifier Using a Parallel Branching Program Machine
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura
DSD
2010
IEEE
126views Hardware» more  DSD 2010»
11 years 2 days ago
Low Power FPGA Implementations of 256-bit Luffa Hash Function
Low power techniques in a FPGA implementation of the hash function called Luffa are presented in this paper. This hash function is under consideration for adoption as standard. Tw...
Paris Kitsos, Nicolas Sklavos, Athanassios N. Skod...
DSD
2010
IEEE
111views Hardware» more  DSD 2010»
10 years 10 months ago
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication
— A method how to improve the coverage of single faults in combinational circuits is proposed. The method is based on Concurrent Error Detection, but uses a fault simulation to f...
Jaroslav Borecky, Martin Kohlik, Hana Kubatova, Pa...
DSD
2010
IEEE
140views Hardware» more  DSD 2010»
11 years 2 days ago
RobuCheck: A Robustness Checker for Digital Circuits
Abstract—Continuously shrinking feature sizes cause an increasing vulnerability of digital circuits. Manufacturing failures and transient faults may tamper the functionality. Aut...
Stefan Frehse, Görschwin Fey, André S&...
DSD
2010
IEEE
131views Hardware» more  DSD 2010»
10 years 10 months ago
A Test Bench for Distortion-Energy Optimization of a DSP-Based H.264/SVC Decoder
This paper describes an OMAP-based real-time test bench to find the Pareto frontier of an H.264/SVC decoder within a distortion-energy optimization space. A metric to estimate vide...
F. Pescador, E. Juarez, D. Samper, C. Sanz, Micka&...
books