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ERSA
2009
185views Hardware» more  ERSA 2009»
13 years 2 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl
ERSA
2009
149views Hardware» more  ERSA 2009»
13 years 2 months ago
Hardware-Optimized Ziggurat Algorithm for High-Speed Gaussian Random Number Generators
Many scientific and engineering applications, which are increasingly being ported from software to reconfigurable platforms, require Gaussian-distributed random numbers. Thus, the...
Hassan Edrees, Brian Cheung, McCullen Sandora, Dav...
ERSA
2009
149views Hardware» more  ERSA 2009»
13 years 2 months ago
Harnessing Human Computation Cycles for the FPGA Placement Problem
Harnessing human computation is an approach to find problem solutions. In this paper, we investigate harnessing this human computation for a Field Programmable Gate Array (FPGA) p...
Luke Terry, Vladimir Roitch, Shoeb Tufail, Kirit S...