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FCCM
2009
IEEE
134views VLSI» more  FCCM 2009»
13 years 8 months ago
Efficient Mapping of Hardware Tasks on Reconfigurable Computers Using Libraries of Architecture Variants
Scheduling and partitioning of task graphs on reconfigurable hardware needs to be carefully carried out in order to achieve the best possible performance. In this paper, we demons...
Miaoqing Huang, Vikram K. Narayana, Tarek A. El-Gh...
FCCM
2009
IEEE
322views VLSI» more  FCCM 2009»
13 years 8 months ago
On-Orbit Flight Results from the Reconfigurable Cibola Flight Experiment Satellite (CFESat)
Abstract--The Cibola Flight Experiment (CFE) is an experimental small satellite developed at the Los Alamos National Laboratory to demonstrate the feasibility of using FPGA-based r...
Michael P. Caffrey, Keith Morgan, Diane Roussel-Du...
FCCM
2009
IEEE
148views VLSI» more  FCCM 2009»
13 years 11 months ago
A Packet Generator on the NetFPGA Platform
— A packet generator and network traffic capture system has been implemented on the NetFPGA. The NetFPGA is an open networking platform accelerator that enables rapid developmen...
G. Adam Covington, Glen Gibb, John W. Lockwood, Ni...