Sciweavers

20 search results - page 4 / 4
» fmcad 2008
Sort
View
FMCAD
2008
Springer
13 years 6 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse
10
Voted
FMCAD
2008
Springer
13 years 6 months ago
Going with the Flow: Parameterized Verification Using Message Flows
A message flow is a sequence of messages sent among processors during the execution of a protocol, usually illustrated with something like a message sequence chart. Protocol design...
Murali Talupur, Mark R. Tuttle
FMCAD
2008
Springer
13 years 6 months ago
A Temporal Language for SystemC
We describe a general approach for defining new temporal specification languages, and adopting existing languages, for SystemC. We define the concept of "underlying trace"...
Deian Tabakov, Gila Kamhi, Moshe Y. Vardi, Eli Sin...
FMCAD
2008
Springer
13 years 6 months ago
BackSpace: Formal Analysis for Post-Silicon Debug
Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall ...
Flavio M. de Paula, Marcel Gort, Alan J. Hu, Steve...
FMCAD
2008
Springer
13 years 6 months ago
Automatic Non-Interference Lemmas for Parameterized Model Checking
Parameterized model checking refers to any method that extends traditional, finite-state model checking to handle systems arbitrary number of processes. One popular approach to thi...
Jesse D. Bingham