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FPGA
2005
ACM

174views FPGA» more FPGA 2005»

64-bit floating-point FPGA matrix multiplication

13 years 10 months ago

We introduce a 64-bit ANSI/IEEE Std 754-1985 ﬂoating point design of a hardware matrix multiplier optimized for FPGA implementations. A general block matrix multiplication algor...

Yong Dou, Stamatis Vassiliadis, Georgi Kuzmanov, G...

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15

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FPGA
2005
ACM

158views FPGA» more FPGA 2005»

Automated synthesis for asynchronous FPGAs

13 years 10 months ago

Download www.csl.cornell.edu

We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...

Song Peng, David Fang, John Teifel, Rajit Manohar

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15

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FPT
2005
IEEE

132views Hardware» more FPT 2005»

Accelerating FPGA Routing Using Architecture-Adaptive A* Techniques

13 years 10 months ago

Download www.ee.washington.edu

Akshay Sharma, Scott Hauck

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13

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ICES
2005
Springer

81views Hardware» more ICES 2005»

An Evolvable Image Filter: Experimental Evaluation of a Complete Hardware Implementation in FPGA

13 years 10 months ago

Download www.fit.vutbr.cz

Tomás Martínek, Lukás Sekanin...

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14

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FPT
2005
IEEE

133views Hardware» more FPT 2005»

FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator

13 years 10 months ago

Download doras.dcu.ie

Two FPGA implementations of a Shape Adaptive Discrete Cosine Transform (SA-DCT) accelerator are presented in this paper: one PCI-based and the other AMBA-based. The former is used...

Andrew Kinane, Alan Casey, Valentin Muresan, Noel ...

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