36 search results - page 3 / 8 » glvlsi 2009 |
GLVLSI
2009
IEEE
13 years 9 months ago
2009
IEEE
To address the increasing demand for reliability in on-chip networks, we proposed a novel Reliability Aware Virtual channel (RAVC) NoC router micro-architecture that enables both ...
GLVLSI
2009
IEEE
14 years 2 days ago
2009
IEEE
The sequential depth determines the completeness of bounded model checking in design verification. Recently, a SATbased method is proposed to compute the sequential depth of a de...
GLVLSI
2009
IEEE
14 years 2 days ago
2009
IEEE
Recently, cooperative communication has attracted a lot of attention for its potential to increase spatial diversity. However, limited attention has been paid to the physical laye...
GLVLSI
2009
IEEE
14 years 2 days ago
2009
IEEE
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
GLVLSI
2009
IEEE
14 years 2 days ago
2009
IEEE
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...