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ICCAD
1996
IEEE
76views Hardware» more  ICCAD 1996»
13 years 10 months ago
Directional bias and non-uniformity in FPGA global routing architectures
This paper investigates the effect of the prefabricated routing track distribution on the area-efficiency of FPGAs. The first question we address is whether horizontal and vertica...
Vaughn Betz, Jonathan Rose
ICCAD
1996
IEEE
85views Hardware» more  ICCAD 1996»
13 years 10 months ago
Exploiting regularity for low-power design
Abstract -- Current day behavioral-synthesis techniques produce architectures that are power-inefficient in the interconnect. Experiments have demonstrated that in synthesized desi...
Renu Mehra, Jan M. Rabaey
ICCAD
1996
IEEE
131views Hardware» more  ICCAD 1996»
13 years 10 months ago
Multi-level logic optimization for low power using local logic transformations
In this paper we present an ecient technique to reduce the switching activity in a CMOS combinational logic network based on local logic transformations. These transformations con...
Qi Wang, Sarma B. K. Vrudhula
ICCAD
1996
IEEE
144views Hardware» more  ICCAD 1996»
13 years 10 months ago
Validation coverage analysis for complex digital designs
The functional validation of a state-of-the-art digital design is usually performed by simulation of a register-transfer-level model. The degree to which the testvector suite cove...
Richard C. Ho, Mark Horowitz
ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
13 years 10 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu