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ICCAD
1999
IEEE
66views Hardware» more  ICCAD 1999»
13 years 9 months ago
Timing-safe false path removal for combinational modules
A delay abstraction of a combinational module is a compact representation of the delay information of the module, which carries effective pin-to-pin delay for each primary-input/pr...
Yuji Kukimoto, Robert K. Brayton
ICCAD
1999
IEEE
181views Hardware» more  ICCAD 1999»
13 years 9 months ago
A new heuristic for rectilinear Steiner trees
The minimum rectilinear Steiner tree (RST) problem is one of the fundamental problems in the field of electronic design automation. The problem is NP-hard, and much work has been ...
Ion I. Mandoiu, Vijay V. Vazirani, Joseph L. Ganle...
ICCAD
1999
IEEE
86views Hardware» more  ICCAD 1999»
13 years 9 months ago
A framework for testing core-based systems-on-a-chip
Available techniques for testing core-based systems-on-a-chip (SOCs) do not provide a systematic means for synthesising low-overhead test architectures and compact test solutions....
Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jh...
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
13 years 9 months ago
Modeling design constraints and biasing in simulation using BDDs
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller,...