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ICCAD
2002
IEEE
113views Hardware» more  ICCAD 2002»
14 years 2 months ago
Interconnect-aware high-level synthesis for low power
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
Lin Zhong, Niraj K. Jha
ICCAD
2002
IEEE
124views Hardware» more  ICCAD 2002»
14 years 2 months ago
Symbolic pointer analysis
— One of the bottlenecks in the recent movement of hardware synthesis from behavioral C programs is the difficulty in reasoning about runtime pointer values at compile time. The...
Jianwen Zhu
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 2 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
14 years 2 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik
ICCAD
2002
IEEE
227views Hardware» more  ICCAD 2002»
14 years 2 months ago
Generic ILP versus specialized 0-1 ILP: an update
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...