Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
— One of the bottlenecks in the recent movement of hardware synthesis from behavioral C programs is the difficulty in reasoning about runtime pointer values at compile time. The...
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...