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ICCAD
2005
IEEE
14 years 2 months ago
2005
IEEE
As technology scales, the shrinking wire width increases the interconnect resistivity, while the decreasing interconnect spacing significantly increases the coupling capacitance. ...
ICCAD
2005
IEEE
14 years 2 months ago
2005
IEEE
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
ICCAD
2005
IEEE
14 years 2 months ago
2005
IEEE
The increasing variability of process parameters leads to substantial parametric yield losses due to timing and leakage power constraints. Leakage power is especially affected by ...
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
— This paper presents a robust quadratic placement approach, which offers both high-quality placements and excellent computational efficiency. The additional force which distrib...