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ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 3 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
ICCAD
2009
IEEE
125views Hardware» more  ICCAD 2009»
13 years 3 months ago
CROP: Fast and effective congestion refinement of placement
Modern circuits become harder to route with the ever decreasing design features. Previous routability-driven placement techniques are usually tightly coupled with the underlying p...
Yanheng Zhang, Chris Chu
ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
13 years 3 months ago
Mitigation of intra-array SRAM variability using adaptive voltage architecture
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
Ashish Kumar Singh, Ku He, Constantine Caramanis, ...
ICCAD
2009
IEEE
151views Hardware» more  ICCAD 2009»
13 years 3 months ago
Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
Mohit Gupta, Kwangok Jeong, Andrew B. Kahng
ICCAD
2009
IEEE
117views Hardware» more  ICCAD 2009»
13 years 3 months ago
Binning optimization based on SSTA for transparently-latched circuits
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
Min Gong, Hai Zhou, Jun Tao, Xuan Zeng