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iccad 2010
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On power and fault-tolerance optimization in FPGA physical synthesis
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robust-fpga.mpi-sws.org
Manu Jose, Yu Hu, Rupak Majumdar
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ESL solutions for low power design
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www2.minatec.com
Sylvian Kaiser, Ilija Materic, Rabih Saade
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Redundant-wires-aware ECO timing and mask cost optimization
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www.koryu.or.jp
Shao-Yun Fang, Tzuo-Fan Chien, Yao-Wen Chang
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Design of large area electronics with organic transistors
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icdesign.iis.u-tokyo.ac.jp
Makoto Takamiya, Koichi Ishida, Tsuyoshi Sekitani,...
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3D-ICE: Fast compact transient thermal modeling for 3D ICs with inter-tier liquid cooling
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Arvind Sridhar, Alessandro Vincenzi, Martino Ruggi...
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