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10

ICCD
1995
IEEE

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Testability analysis and insertion for RTL circuits based on pseudorandom BIST

13 years 8 months ago

Testability analysis and insertion for RTL circuits based on pseudorandom BIST

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Joan Carletta, Christos A. Papachristou

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10

ICCD
1995
IEEE

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Caching processor general registers

13 years 8 months ago

Caching processor general registers

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Robert Yung, Neil C. Wilhelm

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10

ICCD
1995
IEEE

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A coprocessor for accurate and reliable numerical computations

13 years 8 months ago

A coprocessor for accurate and reliable numerical computations

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Michael J. Schulte, Earl E. Swartzlander Jr.

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12

ICCD
1995
IEEE

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Analysis of conditional resource sharing using a guard-based control representation

13 years 8 months ago

Analysis of conditional resource sharing using a guard-based control representation

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Optimization of hardware resources for conditional data-ﬂow graph behavior is particularly important when conditional behavior occurs in cyclic loops and maximization of through...

Ivan P. Radivojevic, Forrest Brewer

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10

ICCD
1995
IEEE

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Implementing a STARI chip

13 years 8 months ago

Implementing a STARI chip

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STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...

Mark R. Greenstreet

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