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ICCD
2003
IEEE
112views Hardware» more  ICCD 2003»
14 years 1 months ago
Power Efficient Data Cache Designs
This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in pe...
Jaume Abella, Antonio González
ICCD
2003
IEEE
98views Hardware» more  ICCD 2003»
14 years 1 months ago
Specifying and Verifying Systems with Multiple Clocks
Multiple clock domains are a challenge for hardware specification and verification. We present a method for specifying the relations between multiple clocks, and for modeling th...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
ICCD
2003
IEEE
177views Hardware» more  ICCD 2003»
14 years 1 months ago
SAT-Based Algorithms for Logic Minimization
This paper introduces a new method for two-level logic minimization. Unlike previous approaches, the new method uses a SAT solver as an underlying engine. While the overall minimi...
Samir Sapra, Michael Theobald, Edmund M. Clarke
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
13 years 10 months ago
Power-Time Tradeoff in Test Scheduling for SoCs
We present a test scheduling methodology for core-based system-on-chips that allows tradeoff between system power dissipation and overall test time. The basic strategy is to use t...
Mehrdad Nourani, James Chin
ICCD
2003
IEEE
104views Hardware» more  ICCD 2003»
13 years 10 months ago
Non-Crossing OBDDs for Mapping to Regular Circuit Structures
In this paper, we propose a novel compact BDD structure, called Non-crossing ordered BDD (NCOBDD), that can be mapped directly to a regular circuit structure. Compared with other ...
Aiqun Cao, Cheng-Kok Koh