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ICPP
2008
IEEE
14 years 5 days ago
2008
IEEE
—Transactional Memory (TM) takes responsibility for concurrent, atomic execution of labeled regions of code, freeing the programmer from the need to manage locks. Typical impleme...
ICPP
2008
IEEE
14 years 5 days ago
2008
IEEE
A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, high-speed interface to increase the device density and ...
ICPP
2008
IEEE
14 years 5 days ago
2008
IEEE
Solving large, irregular graph problems efficiently is challenging. Current software systems and commodity multiprocessors do not support fine-grained, irregular parallelism wel...
ICPP
2008
IEEE
14 years 5 days ago
2008
IEEE
Abstract—The Sparse Matrix-Vector Multiplication kernel exhibits limited potential for taking advantage of modern shared memory architectures due to its large memory bandwidth re...
ICPP
2008
IEEE
14 years 5 days ago
2008
IEEE
This paper presents a novel stateless, virtualized communication engine for sub-microsecond latency. Using a Field-Programmable-Gate-Array (FPGA) based prototype we show a latency...