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IEEEPACT
2003
IEEE
13 years 9 months ago
Efficient Resource Management during Instruction Scheduling for the EPIC Architecture
Effective modeling and management of hardware resources have always been critical toward generating highly efficient code in static compilers. With Just-In-Time compilation and dy...
Dong-yuan Chen, Lixia Liu, Chen Fu, Shuxin Yang, C...
IEEEPACT
2003
IEEE
13 years 9 months ago
Initial Observations of the Simultaneous Multithreading Pentium 4 Processor
This paper analyzes an Intel Pentium 4 hyper-threading processor. The focus is to understand its performance and the underlying reasons behind that performance. Particular attenti...
Nathan Tuck, Dean M. Tullsen
IEEEPACT
2003
IEEE
13 years 9 months ago
Miss Rate Prediction across All Program Inputs
Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight into how cache behav...
Yutao Zhong, Steve Dropsho, Chen Ding
IEEEPACT
2003
IEEE
13 years 9 months ago
Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures
This paper describes Compiler-Directed Content-Aware Prefetching (CDCAP), an integrated compiler and hardware approach for prefetching dynamic data structures. The approach utiliz...
Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors
IEEEPACT
2003
IEEE
13 years 9 months ago
Redeeming IPC as a Performance Metric for Multithreaded Programs
Recent work has shown that multithreaded workloads running in execution-driven, full-system simulation environments cannot use instructions per cycle (IPC) as a valid performance ...
Kevin M. Lepak, Harold W. Cain, Mikko H. Lipasti