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ICCD
2003
IEEE
111views Hardware» more  ICCD 2003»
14 years 2 months ago
Routed Inter-ALU Networks for ILP Scalability and Performance
Modern processors rely heavily on broadcast networks to bypass instruction results to dependent instructions in the pipeline. However, as clock rates increase, architectures get w...
Karthikeyan Sankaralingam, Vincent Ajay Singh, Ste...
IPPS
2003
IEEE
13 years 10 months ago
Exploiting Java-ILP on a Simultaneous Multi-Trace Instruction Issue (SMTI) Processor
The available Instruction Level Parallelism in Java bytecode (Java-ILP) is not readily exploitable using traditional in-order or out-of-order issue mechanisms due to dependencies ...
R. Achutharaman, R. Govindarajan, G. Hariprakash, ...
MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
13 years 10 months ago
Scalable Hardware Memory Disambiguation for High ILP Processors
This paper describes several methods for improving the scalability of memory disambiguation hardware for future high ILP processors. As the number of in-flight instructions grows...
Simha Sethumadhavan, Rajagopalan Desikan, Doug Bur...
ILP
2003
Springer
13 years 10 months ago
Comparative Evaluation of Approaches to Propositionalization
Propositionalization has already been shown to be a particularly promising approach for robustly and effectively handling relational data sets for knowledge discovery. In this pap...
Mark-A. Krogel, Simon Rawles, Filip Zelezný...
ML
2006
ACM
143views Machine Learning» more  ML 2006»
13 years 5 months ago
Mathematical applications of inductive logic programming
The application of Inductive Logic Programming to scientific datasets has been highly successful. Such applications have led to breakthroughs in the domain of interest and have dri...
Simon Colton, Stephen Muggleton