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ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
13 years 9 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...
CAV
2010
Springer
282views Hardware» more  CAV 2010»
13 years 8 months ago
A NuSMV Extension for Graded-CTL Model Checking
Graded-CTL is an extension of CTL with graded quantifiers which allow to reason about either at least or all but any number of possible futures. In this paper we show an extension...
Alessandro Ferrante, Maurizio Memoli, Margherita N...