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ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
11 years 7 months ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek
ISCA
2012
IEEE
242views Hardware» more  ISCA 2012»
11 years 7 months ago
Side-channel vulnerability factor: A metric for measuring information leakage
There have been many attacks that exploit side-effects of program execution to expose secret information and many proposed countermeasures to protect against these attacks. Howeve...
John Demme, Robert Martin, Adam Waksman, Simha Set...
ISCA
2012
IEEE
224views Hardware» more  ISCA 2012»
11 years 7 months ago
A first-order mechanistic model for architectural vulnerability factor
Soft error reliability has become a first-order design criterion for modern microprocessors. Architectural Vulnerability Factor (AVF) modeling is often used to capture the probab...
Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, Lizy...
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
11 years 7 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...
ISCA
2012
IEEE
248views Hardware» more  ISCA 2012»
11 years 7 months ago
Watchdog: Hardware for safe and secure manual memory management and full memory safety
Languages such as C and C++ use unsafe manual memory management, allowing simple bugs (i.e., accesses to an object after deallocation) to become the root cause of exploitable secu...
Santosh Nagarakatte, Milo M. K. Martin, Steve Zdan...