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ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
13 years 10 months ago
A low-power, multichannel gated oscillator-based CDR for short-haul applications
A gated current-controlled oscillator (GCCO) based topology is used to implement a low-power multi-channel clock and data recovery (CDR) system in a 0.18um digital CMOS technology...
Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi,...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
13 years 10 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
13 years 10 months ago
Energy reduction in multiprocessor systems using transactional memory
The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniproc...
Tali Moreshet, R. Iris Bahar, Maurice Herlihy
ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
13 years 10 months ago
Low-power fanout optimization using multiple threshold voltage inverters
This paper addresses the problem of low-power fanout optimization with multiple threshold voltage inverters. Introducing splitting and merging conversions that preserve delay, pow...
Behnam Amelifard, Farzan Fallah, Massoud Pedram
ISLPED
2005
ACM
68views Hardware» more  ISLPED 2005»
13 years 10 months ago
Two efficient methods to reduce power and testing time
Reducing power dissipation and testing time is accomplished by forming two clusters of don’t-care bit inside an input and a response test cube. New reordering scheme of scan lat...
Il-soo Lee, Tony Ambler