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ISMVL
2006
IEEE
108views Hardware» more  ISMVL 2006»
13 years 10 months ago
A Novel Balanced Ternary Adder Using Recharged Semi-Floating Gate Devices
Abstract— This paper presents a novel voltage mode Balanced Ternary Adder (BTA), implemented with Recharged SemiFloating Gate Devices. By using balanced ternary notation, it poss...
Henning Gundersen, Yngvar Berg
ISMVL
2006
IEEE
104views Hardware» more  ISMVL 2006»
13 years 10 months ago
Design Methods for Multiple-Valued Input Address Generators
A multiple-valued input address generator produces a unique address given a multiple-valued input data vector. This paper presents methods to realize multiple-valued input address...
Tsutomu Sasao
ISMVL
2006
IEEE
99views Hardware» more  ISMVL 2006»
13 years 10 months ago
Signal Processing Algorithms and Multiple-Valued Logic Design Methods
Multiple-valued logic can be viewed as an alternative approach to solving many problems in transmission, storage, and processing of large and even increasing amounts of informatio...
Jaakko Astola, Radomir S. Stankovic
ISMVL
2006
IEEE
117views Hardware» more  ISMVL 2006»
13 years 10 months ago
Representations of Elementary Functions Using Binary Moment Diagrams
This paper considers representations for elementary functions such as polynomial, trigonometric, logarithmic, square root, and reciprocal functions. These real valued functions ar...
Tsutomu Sasao, Shinobu Nagayama