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ISMVL
2008
IEEE
109views Hardware» more  ISMVL 2008»
8 years 10 months ago
Deciding the Satisfiability of Propositional Formulas in Finitely-Valued Signed Logics
Victor Chepoi, Nadia Creignou, Miki Hermann, Gerno...
ISMVL
2008
IEEE
126views Hardware» more  ISMVL 2008»
8 years 10 months ago
Betweenness, Metrics and Entropies in Lattices
We investigate a class of metrics on lattices that are compatible with the partial order defined by the lattice using the ternary relation of betweenness that can be naturally de...
Dan A. Simovici
ISMVL
2008
IEEE
134views Hardware» more  ISMVL 2008»
8 years 10 months ago
Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical Cells
Nanoscale multiple-valued logic systems require the development of nanometer scale integrated circuits and components. Due to limits in device physics, new components must be deve...
Theodore W. Manikas, Dale Teeters
ISMVL
2008
IEEE
155views Hardware» more  ISMVL 2008»
8 years 10 months ago
Reversible Realization of Quaternary Decoder, Multiplexer, and Demultiplexer Circuits
—A quaternary reversible circuit is more compact than the corresponding binary reversible circuit in terms of number of input/output lines required. Decoder, multiplexer, and dem...
Mozammel H. A. Khan
ISMVL
2008
IEEE
119views Hardware» more  ISMVL 2008»
8 years 10 months ago
Encoding Max-CSP into Partial Max-SAT
We define a number of original encodings that map MaxCSP instances into Partial Max-SAT instances. Our encodings rely on the well-known direct and support encodings from CSP into...
Josep Argelich, Alba Cabiscol, Inês Lynce, F...
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