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ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
13 years 9 months ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
ISPD
1997
ACM
106views Hardware» more  ISPD 1997»
13 years 9 months ago
VLSI/PCB placement with obstacles based on sequence-pair
In a typical VLSI/PCB design, some modules are pre-placed in advance, and the other modules are requested to be placed without overlap with these pre-placed modules. The presence ...
Hiroshi Murata, Kunihiro Fujiyoshi, Mineo Kaneko
ISPD
1997
ACM
104views Hardware» more  ISPD 1997»
13 years 9 months ago
Timing driven placement in interaction with netlist transformations
In this paper, we present a new approach that performs timing driven placement for standard cell circuits in interaction with netlist transformations. As netlist transformations a...
Guenter Stenz, Bernhard M. Riess, Bernhard Rohflei...
ISPD
1997
ACM
110views Hardware» more  ISPD 1997»
13 years 9 months ago
Performance driven global routing for standard cell design
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
Jason Cong, Patrick H. Madden
ISPD
1997
ACM
68views Hardware» more  ISPD 1997»
13 years 9 months ago
Faster minimization of linear wirelength for global placement
A linear wirelength objective more e ectively captures timing, congestion, and other global placement considerations than a squared wirelength objective. The GORDIAN-L cell placem...
Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huan...