Sciweavers

22 search results - page 4 / 5
» ispd 1999
Sort
View
ISPD
1999
ACM
112views Hardware» more  ISPD 1999»
13 years 9 months ago
Arbitrary convex and concave rectilinear block packing using sequence-pair
The sequence-pair was proposed in 1994 as a representation of the packing of rectangles of general structure. Since then, there have been e orts to expand its applicability over s...
Kunihiro Fujiyoshi, Hiroshi Murata
ISPD
1999
ACM
127views Hardware» more  ISPD 1999»
13 years 9 months ago
Buffer insertion for clock delay and skew minimization
 Buffer insertion is an effective approach to achieve both minimal clock signal delay and skew in high speed VLSI circuit design. In this paper, we develop an optimal buffer ins...
X. Zeng, D. Zhou, Wei Li
ISPD
1999
ACM
89views Hardware» more  ISPD 1999»
13 years 9 months ago
VIA design rule consideration in multi-layer maze routing algorithms
—Maze routing algorithms are widely used for finding an optimal path in detailed routing for very large scale integration, printed circuit board and multichip modules In this pap...
Jason Cong, Jie Fang, Kei-Yong Khoo
ISPD
1999
ACM
98views Hardware» more  ISPD 1999»
13 years 9 months ago
Towards synthetic benchmark circuits for evaluating timing-driven CAD tools
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
Dirk Stroobandt, Peter Verplaetse, Jan Van Campenh...
ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
13 years 9 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah