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ISQED
2005
IEEE
13 years 10 months ago
2005
IEEE
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
ISQED
2005
IEEE
13 years 10 months ago
2005
IEEE
Adding on-chip decoupling capacitors (decaps) is an effective way to reduce voltage noise in power/ground networks and ensure robust power delivery. In this paper, we present a fa...
ISQED
2005
IEEE
13 years 10 months ago
2005
IEEE
Recently, a new Dynamic Voltage Scaling (DVS) scheme has been proposed that increases energy efficiency significantly by allowing the processor to operate at or slightly below the...
ISQED
2005
IEEE
13 years 10 months ago
2005
IEEE
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
ISQED
2005
IEEE
13 years 10 months ago
2005
IEEE
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...