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JEC
2006
88views more  JEC 2006»
8 years 9 months ago
Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
John Oliver, Ravishankar Rao, Diana Franklin, Fred...
JEC
2006
77views more  JEC 2006»
8 years 9 months ago
Tiny split data-caches make big performance impact for embedded applications
This paper shows that even very small data caches, when split to serve data streams exhibiting temporal and spatial localities, can improve performance of embedded applications wit...
Afrin Naz, Krishna M. Kavi, Wentong Li, Philip H. ...
JEC
2006
90views more  JEC 2006»
8 years 9 months ago
The impact of traffic aggregation on the memory performance of networking applications
The trend of the networking processing is to increase the intelligence of the routers (i.e. security capacities). This means that there is an increment in the workload generated p...
Javier Verdú, Jorge García-Vidal, Ma...
JEC
2006
61views more  JEC 2006»
8 years 9 months ago
Time-constrained loop scheduling with minimal resources
Many applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). In our previous work, we proposed a ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
JEC
2006
71views more  JEC 2006»
8 years 9 months ago
Destructive-read in embedded DRAM, impact on power consumption
This paper explores power consumption for destructive-read embedded DRAM. Destructive-read DRAM is based on conventional DRAM design, but with sense amplifiers optimized for lower ...
Haakon Dybdahl, Per Gunnar Kjeldsberg, Marius Gran...
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