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JSA
2007
115views more  JSA 2007»
13 years 4 months ago
Speculative trivialization point advancing in high-performance processors
Trivial instructions are those instructions whose output can be determined without performing the actual computation. This is due to the fact that for these instructions the outpu...
Ehsan Atoofian, Amirali Baniasadi
JSA
2007
152views more  JSA 2007»
13 years 4 months ago
Asynchronous arbiter for micro-threaded chip multiprocessors
This paper presents a scalable and partitionable asynchronous bus arbiter for use with chip multiprocessors (CMP) and its corresponding pre-layout simulation results using VHDL. T...
Nabil Hasasneh, Ian Bell, Chris R. Jesshope
JSA
2007
89views more  JSA 2007»
13 years 4 months ago
Robust codes and robust, fault-tolerant architectures of the Advanced Encryption Standard
— Hardware implementations of cryptographic algorithms are vulnerable to fault analysis attacks. Methods based on traditional fault-tolerant architectures are not suited for prot...
Konrad J. Kulikowski, Mark G. Karpovsky, Alexander...
JSA
2007
84views more  JSA 2007»
13 years 4 months ago
Optimizing data structures at the modeling level in embedded multimedia
Traditional design techniques for embedded systems apply transformations on the source code to optimize hardwarerelated cost factors. Unfortunately, such transformations cannot ad...
Marijn Temmerman, Edgar G. Daylight, Francky Catth...
JSA
2007
162views more  JSA 2007»
13 years 4 months ago
Exploration of distributed shared memory architectures for NoC-based multiprocessors
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...