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MTV
2006
IEEE
138views Hardware» more  MTV 2006»
13 years 10 months ago
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs
In this paper we will present an optimized structural 01X-SAT-solver for bounded model checking of blackbox designs that exploits semantical knowledge regarding the node selection...
Marc Herbstritt, Bernd Becker, Christoph Scholl
MTV
2006
IEEE
97views Hardware» more  MTV 2006»
13 years 10 months ago
Circuit Profiling Mechanisms for High-Level {ATPG}
—Our Mutation-based Validation Paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently generate test sequences, we nee...
Jorge Campos, Hussain Al-Asaad
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
13 years 10 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...
IJCV
2007
118views more  IJCV 2007»
13 years 4 months ago
Disambiguating Visual Motion by Form-Motion Interaction - a Computational Model
The neural mechanisms underlying motion segregation and integration still remain unclear to a large extent. Local motion estimates often are ambiguous in the lack of form features,...
Pierre Bayerl, Heiko Neumann