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DFT
2000
IEEE
106views VLSI» more  DFT 2000»
13 years 8 months ago
Self-Configuration of a Large Area Integrated Multiprocessor System for Video Applications
We present a configuration technique for a Large Area Integrated Circuit (LAIC) which is manufactured by wafer stepping. A LAIC consists of four identical subsystems, i.e., a subs...
Markus Rudack, Michael Redeker, Dieter Treytnar, O...
PADS
2000
ACM
13 years 9 months ago
ROSS: a high-performance, low memory, modular time warp system
In this paper, we introduce a new Time Warp system called ROSS: Rensselaer’s Optimistic Simulation System. ROSS is an extremely modular kernel that is capable of achieving event...
Christopher D. Carothers, David W. Bauer, Shawn Pe...
PADS
2000
ACM
13 years 9 months ago
Distributed, parallel simulation of multiple, deliberative agents
Multi-agent systems comprise multiple, deliberative agents embedded in and recreating patterns of interactions. Each agent’s execution consumes considerable storage and calculat...
Adelinde Uhrmacher, K. Gugler
PADS
2000
ACM
13 years 9 months ago
Applying parallel discrete event simulation to network emulation
The simulation of wide area computer networks is one area where the benefits of parallel simulation have been clearly demonstrated. Here we present a description of a system that...
Rob Simmonds, Russell Bradford, Brian Unger
DATE
2000
IEEE
83views Hardware» more  DATE 2000»
13 years 9 months ago
A New IEEE 1149.1 Boundary Scan Design for the Detection of Delay Defects
Delay defects on I/O pads, interconnections of a board, or interconnections among embedded cores can not be tested with the current IEEE 1149.1 boundary scan design. This paper in...
Sungju Park, Taehyung Kim