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PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
Current characterization methods introduce an important error in the measurement process. In this paper, we present a novel method to drive the timing characterization of logic gat...
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. The logical effort method has appeared very convenient for fast estimation and optimization of single paths. However it necessitates a calibration of all the gates of the...
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. In this paper we present a new approach to power modeling and runtime power estimation for wireless network interface cards (WNICs). We obtain run-time power estimates by...
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
Motivated by very/ultra large scale integrated circuit (VLSI/ULSI) physical design applications, we study the construction of rectilinear minimum spanning tree (RMST) with its maxi...
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
This paper surveys different implementations of dividers on FPGA technology. A special attention is paid on ATP (area-time-power) trade-offs between restoring, non-restoring, and S...