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RECONFIG
2008
IEEE
104views VLSI» more  RECONFIG 2008»
12 years 4 months ago
A Hybrid FPGA/Coarse Parallel Processing Architecture for Multi-modal Visual Feature Descriptors
Lars Baunegaard With Jensen, Anders Kjaer-Nielsen,...
RECONFIG
2008
IEEE
122views VLSI» more  RECONFIG 2008»
12 years 4 months ago
Using a CSP Based Programming Model for Reconfigurable Processor Arrays
The growing trend towards adoption of flexible and heterogeneous, parallel computing architectures has increased the challenges faced by the programming community. We propose a me...
Zain-ul-Abdin, Bertil Svensson
RECONFIG
2008
IEEE
184views VLSI» more  RECONFIG 2008»
12 years 4 months ago
FPGA Implementation of an Elliptic Curve Cryptosystem over GF(3^m)
This paper describes an efficient arithmetic processor for elliptic curve cryptography. The proposed processor consists of special architectural components, the most important of...
Ilker Yavuz, Siddika Berna Ors Yalcin, Çeti...
RECONFIG
2008
IEEE
122views VLSI» more  RECONFIG 2008»
12 years 4 months ago
Embedded Harmonic Control for Trajectory Planning in Large Environments
This paper presents an embedded FPGA–based architecture to compute navigation trajectories along a harmonic potential. The goals and obstacles may be changed during computation....
Cesar Torres-Huitzil, Bernard Girau, Amine M. Boum...
RECONFIG
2008
IEEE
107views VLSI» more  RECONFIG 2008»
12 years 4 months ago
Fast Implementation of a Bio-inspired Model for Decentralized Gathering
In the context of the emergence of alternative computing resources to address the challenge of the upcoming end of Moore’s law, we consider the feasibility of gathering computat...
Bernard Girau, Cesar Torres-Huitzil
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