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SAMOS
2004
Springer
13 years 10 months ago
Self-loop Pipelining and Reconfigurable Dataflow Arrays
Abstract. This paper presents some interesting concepts of static dataflow machines that can be used by reconfigurable computing architectures. We introduce some data-driven reconf...
João M. P. Cardoso
SAMOS
2004
Springer
13 years 10 months ago
Modeling Loop Unrolling: Approaches and Open Issues
Abstract. Loop unrolling plays an important role in compilation for Reconfigurable Processing Units (RPUs) as it exposes operator parallelism and enables other transformations (e.g...
João M. P. Cardoso, Pedro C. Diniz
SAMOS
2004
Springer
13 years 10 months ago
A Low-Power Multithreaded Processor for Baseband Communication Systems
Embedded digital signal processors for baseband communication systems have stringent design constraints including high computational bandwidth, low power consumption, and low inter...
Michael J. Schulte, C. John Glossner, Suman Mamidi...
SAMOS
2004
Springer
13 years 10 months ago
with Wide Functional Units
— Architectural resources and program recurrences are the main limitations to the amount of Instruction-Level Parallelism (ILP) exploitable from loops, the most time-consuming pa...
Miquel Pericàs, Eduard Ayguadé, Javi...
SAMOS
2004
Springer
13 years 10 months ago
DIF: An Interchange Format for Dataflow-Based Design Tools
The dataflow interchange format (DIF) is a textual language that is geared towards capturing the semantics of graphical design tools for DSP system design. A key objective of DIF i...
Chia-Jui Hsu, Fuat Keceli, Ming-Yung Ko, Shahrooz ...