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SASP
2008
IEEE
140views Hardware» more  SASP 2008»
13 years 11 months ago
An FPGA Design Space Exploration Tool for Matrix Inversion Architectures
— Matrix inversion is a common function found in many algorithms used in wireless communication systems. As FPGAs become an increasingly attractive platform for wireless communic...
Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan ...
SASP
2008
IEEE
153views Hardware» more  SASP 2008»
13 years 11 months ago
TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing
Ray tracing is a technique used for generating highly realistic computer graphics images. In this paper, we explore the design of a simple but extremely parallel, multi-threaded, ...
Josef B. Spjut, Solomon Boulos, Daniel Kopta, Erik...
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
13 years 11 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
SASP
2008
IEEE
162views Hardware» more  SASP 2008»
13 years 11 months ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...