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TC
1998
13 years 4 months ago
Optimizing the Instruction Cache Performance of the Operating System
—High instruction cache hit rates are key to high performance. One known technique to improve the hit rate of caches is to minimize cache interference by improving the layout of ...
Josep Torrellas, Chun Xia, Russell L. Daigle
TC
1998
13 years 6 months ago
Propagating Integrity Information among Interrelated Databases
Data integrity policies often require that quality and integrity metadata be generated and communicated to potential users. However, in data warehouses, federations, and other mul...
Arnon Rosenthal, Edward Sciore
TC
1998
13 years 4 months ago
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices
—This paper describes a new signed-digit full adder (SDFA) circuit consisting of resonant-tunneling diodes (RTDs) and metal-oxide semiconductor field effect transistors (MOSFETs)...
Alejandro F. González, Pinaki Mazumder
TC
1998
13 years 4 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
BROADBAND
1998
13 years 6 months ago
Traffic management in an ATM multi-service switch for workgroups
ATM switches have to provide traffic management functions to meet the QoS requirements of different service categories. Among the traffic management functions we will focus on con...
Stefan Bodamer, Thomas Renger, Georg Röß...