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VTS
2002
IEEE
135views Hardware» more  VTS 2002»
13 years 9 months ago
A Self Calibrated ADC BIST Methodology
Hung-kai Chen, Chih-hu Wang, Chau-chin Su
VTS
2002
IEEE
124views Hardware» more  VTS 2002»
13 years 9 months ago
Approximating Infinite Dynamic Behavior for DRAM Cell Defects
Zaid Al-Ars, A. J. van de Goor
VTS
2002
IEEE
107views Hardware» more  VTS 2002»
13 years 9 months ago
Testing High-Speed SoCs Using Low-Speed ATEs
We present a test methodology to allow testing high-speed circuits with low-speed ATEs. The basic strategy is adding an interface circuit to partially supply test data, coordinate...
Mehrdad Nourani, James Chin
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
13 years 9 months ago
Test Pattern Generation for Signal Integrity Faults on Long Interconnects
In this paper, we present a test pattern generation algorithm aiming at signal integrity faults on long interconnects. This is achieved by considering the effect of inputs and par...
Amir Attarha, Mehrdad Nourani