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CORR
2007
Springer
124views Education» more  CORR 2007»
9 years 9 months ago
A Channel that Heats Up
Motivated by on-chip communication, a channel model is proposed where the variance of the additive noise depends on the weighted sum of the past channel input powers. For this chan...
Tobias Koch, Amos Lapidoth, Paul-Peter Sotiriadis
ASPDAC
2008
ACM
83views Hardware» more  ASPDAC 2008»
9 years 11 months ago
Run-time power gating of on-chip routers using look-ahead routing
Since on-chip routers in Network-on-Chips play a key role in on-chip communication between cores, they should be always preparing for packet injections even if a part of cores are ...
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Ama...
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
10 years 2 months ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
CODES
2003
IEEE
10 years 2 months ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
ASPDAC
2004
ACM
98views Hardware» more  ASPDAC 2004»
10 years 2 months ago
Enabling on-chip diversity through architectural communication design
- In this paper, we explore a new concept, called on-chip diversity, and introduce a design methodology for such emerging systems. Simply speaking, on-chip diversity means mixing d...
Tudor Dumitras, Sam Kerner, Radu Marculescu
IPPS
2006
IEEE
10 years 3 months ago
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
AHS
2007
IEEE
247views Hardware» more  AHS 2007»
10 years 3 months ago
Hybrid Communication Medium for Adaptive SoC Architectures
This paper proposes a hybrid communication medium for on-chip communication targeting adaptive SoC architectures. Unlike the work carried out in literature, where the term “hybr...
Balal Ahmad, Ali Ahmadinia, Tughrul Arslan
ISLPED
2009
ACM
97views Hardware» more  ISLPED 2009»
10 years 3 months ago
A high-performance low-power nanophotonic on-chip network
On-chip communication, including short, often-multicast, latency-critical coherence and synchronization messages, and long, unicast, throughput-sensitive data transfer, limits the...
Zheng Li, Jie Wu, Li Shang, Alan R. Mickelson, Man...
ISPASS
2009
IEEE
10 years 4 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
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