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    DATE
    1999
    IEEE
    85views Hardware» more  DATE 1999»
    At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks
    13 years 8 months ago
    At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks
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    As an at-speed solution to board-level interconnect testing, an enhanced boundary-scan architecture utilizing a combination of slightly modified boundary-scan cells and a user-def...
    Jongchul Shin, Hyunjin Kim, Sungho Kang
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