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ASPLOS
2015
ACM
4 years 12 months ago
Beyond the PDP-11: Architectural Support for a Memory-Safe C Abstract Machine
David Chisnall, Colin Rothwell, Robert N. M. Watso...
ASPLOS
2015
ACM
4 years 12 months ago
CommGuard: Mitigating Communication Errors in Error-Prone Parallel Execution
As semiconductor technology scales towards ever-smaller transistor sizes, hardware fault rates are increasing. Since important application classes (e.g., multimedia, streaming wor...
Yavuz Yetim, Sharad Malik, Margaret Martonosi
ASPLOS
2015
ACM
4 years 12 months ago
Chimera: Collaborative Preemption for Multitasking on a Shared GPU
The demand for multitasking on graphics processing units (GPUs) is constantly increasing as they have become one of the default components on modern computer systems along with tr...
Jason Jong Kyu Park, Yongjun Park, Scott A. Mahlke
ASPLOS
2015
ACM
4 years 12 months ago
Mojim: A Reliable and Highly-Available Non-Volatile Memory System
Next-generation non-volatile memories (NVMs) promise DRAM-like performance, persistence, and high density. They can attach directly to processors to form non-volatile main memory ...
Yiying Zhang, Jian Yang, Amirsaman Memaripour, Ste...
ASPLOS
2015
ACM
4 years 12 months ago
Asynchronized Concurrency: The Secret to Scaling Concurrent Search Data Structures
We introduce “asynchronized concurrency (ASCY),” a paradigm consisting of four complementary programming patterns. ASCY calls for the design of concurrent search data structur...
Tudor David, Rachid Guerraoui, Vasileios Trigonaki...
ASPLOS
2015
ACM
4 years 12 months ago
DIABLO: A Warehouse-Scale Computer Network Simulator using FPGAs
Motivated by rapid software and hardware innovation in warehouse-scale computing (WSC), we visit the problem of warehouse-scale network design evaluation. A WSC is composed of abo...
Zhangxi Tan, Zhenghao Qian, Xi Chen, Krste Asanovi...
ASPLOS
2015
ACM
4 years 12 months ago
Automated OS-level Device Runtime Power Management
Non-CPU devices on a modern system-on-a-chip (SoC), ranging from accelerators to I/O controllers, account for a significant portion of the chip area. It is therefore vital for sy...
Chao Xu 0012, Felix Xiaozhu Lin, Yuyang Wang, Lin ...
ASPLOS
2015
ACM
4 years 12 months ago
SPECS: A Lightweight Runtime Mechanism for Protecting Software from Security-Critical Processor Bugs
Processor implementation errata remain a problem, and worse, a subset of these bugs are security-critical. We classified 7 years of errata from recent commercial processors to un...
Matthew Hicks, Cynthia Sturton, Samuel T. King, Jo...
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