Sciweavers

CC
2006
Springer
176views System Software» more  CC 2006»
13 years 7 months ago
The CGiS Compiler-A Tool Demonstration
The CGiS programming language is designed to open up the parallel performance possibilities of graphics processing units (GPUs) to general purpose programmers. This tool demonstrat...
Philipp Lucas, Nicolas Fritz, Reinhard Wilhelm
CC
2005
Springer
13 years 7 months ago
When Abstraction Fails
Andreas Zeller
CC
2005
Springer
195views System Software» more  CC 2005»
13 years 7 months ago
Compilation of Generic Regular Path Expressions Using C++ Class Templates
Various techniques for the navigation and matching of data structures using path expressions have been the subject of extensive investigations. No matter whether such techniques ar...
Luca Padovani
CASES
2005
ACM
13 years 7 months ago
Anomalous path detection with hardware support
Embedded systems are being deployed as a part of critical infrastructures and are vulnerable to malicious attacks due to internet accessibility. Intrusion detection systems have b...
Tao Zhang, Xiaotong Zhuang, Santosh Pande, Wenke L...
CASES
2005
ACM
13 years 7 months ago
The microarchitecture of FPGA-based soft processors
Peter Yiannacouras, Jonathan Rose, J. Gregory Stef...
CASES
2005
ACM
13 years 7 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
CASES
2005
ACM
13 years 7 months ago
Software-directed power-aware interconnection networks
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
Vassos Soteriou, Noel Eisley, Li-Shiuan Peh
CASES
2005
ACM
13 years 7 months ago
Segment protection for embedded systems using run-time checks
The lack of virtual memory protection is a serious source of unreliability in many embedded systems. Without the segment-level protection it provides, these systems are subject to...
Matthew Simpson, Bhuvan Middha, Rajeev Barua
CASES
2005
ACM
13 years 7 months ago
Compilation techniques for energy reduction in horizontally partitioned cache architectures
Horizontally partitioned data caches are a popular architectural feature in which the processor maintains two or more data caches at the same level of hierarchy. Horizontally part...
Aviral Shrivastava, Ilya Issenin, Nikil Dutt