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CASES
2009
ACM
9 years 4 months ago
Mapping stream programs onto heterogeneous multiprocessor systems
This paper presents a partitioning and allocation algorithm for an iterative stream compiler, targeting heterogeneous multiprocessors with constrained distributed memory and any c...
Paul M. Carpenter, Alex Ramírez, Eduard Ayg...
CASES
2009
ACM
9 years 4 months ago
Spatial complexity of reversibly computable DAG
In this paper we address the issue of making a program reversible in terms of spatial complexity. Spatial complexity is the amount of memory/register locations required for perfor...
Mouad Bahi, Christine Eisenbeis
LCTRTS
2010
Springer
9 years 4 months ago
Improving both the performance benefits and speed of optimization phase sequence searches
The issues of compiler optimization phase ordering and selection present important challenges to compiler developers in several domains, and in particular to the speed, code size,...
Prasad A. Kulkarni, Michael R. Jantz, David B. Wha...
LCTRTS
2010
Springer
9 years 4 months ago
Integrating safety analysis into the model-based development toolchain of automotive embedded systems
The automotive industry has a growing demand for the seamless integration of safety analysis tools into the model-based development toolchain for embedded systems. This requires t...
Matthias Biehl, De-Jiu Chen, Martin Törngren
LCTRTS
2010
Springer
9 years 4 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...
LCTRTS
2010
Springer
9 years 4 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla
LCTRTS
2010
Springer
9 years 4 months ago
RNFTL: a reuse-aware NAND flash translation layer for flash memory
In this paper, we propose a hybrid-level flash translation layer (FTL) called RNFTL (Reuse-Aware NFTL) to improve the endurance and space utilization of NAND flash memory. Our bas...
Yi Wang, Duo Liu, Meng Wang, Zhiwei Qin, Zili Shao...
HIPEAC
2010
Springer
9 years 5 months ago
Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a ...
Cesare Ferri, Samantha Wood, Tali Moreshet, R. Iri...
HIPEAC
2010
Springer
9 years 5 months ago
Buffer Sizing for Self-timed Stream Programs on Heterogeneous Distributed Memory Multiprocessors
Abstract. Stream programming is a promising way to expose concurrency to the compiler. A stream program is built from kernels that communicate only via point-to-point streams. The ...
Paul M. Carpenter, Alex Ramírez, Eduard Ayg...
CASES
2010
ACM
9 years 5 months ago
Fine-grain dynamic instruction placement for L0 scratch-pad memory
We present a fine-grain dynamic instruction placement algorithm for small L0 scratch-pad memories (spms), whose unit of transfer can be an individual instruction. Our algorithm ca...
JongSoo Park, James D. Balfour, William J. Dally
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