EURODAC
1995
IEEE
13 years 7 months ago
1995
IEEE
EURODAC
1995
IEEE
13 years 7 months ago
1995
IEEE
This paper describes the features and design methodology of MIDA, a MPEG1 integrated audio decoder. MIDA has been almost completely designed using automatic synthesis of VHDL desc...
EURODAC
1995
IEEE
13 years 7 months ago
1995
IEEE
An important system design task is the partitioning of system functionality for implementation among multiple system components, including partitions among hardware and software c...
EURODAC
1990
IEEE
13 years 8 months ago
1990
IEEE
EURODAC
1990
IEEE
13 years 8 months ago
1990
IEEE
EURODAC
1990
IEEE
13 years 8 months ago
1990
IEEE
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
EURODAC
1990
IEEE
13 years 8 months ago
1990
IEEE
This paper discusses the selection of available components during high-level synthesis. We stress the importance of describing the behaviour of available components in some langua...
EURODAC
1990
IEEE
13 years 8 months ago
1990
IEEE
: In this paper logical cells and algorithms are presented supporting the design of pseudo-exhaustively testable circuits. The approach is based on real hardware segmentation, inst...
EURODAC
1994
IEEE
13 years 8 months ago
1994
IEEE
In this paper we introduce a method to partition UNITY system speci cations into software and hardware parts. This method considers di erent design possibilities and de nes cost f...
EURODAC
1994
IEEE
13 years 8 months ago
1994
IEEE
Symbolic state space exploration techniques for Finite State Machines (FSMs) are a major recent result in CAD for VLSI. Most of them are exact and based on forward traversal, but ...