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GLVLSI
2008
IEEE
129views VLSI» more  GLVLSI 2008»
13 years 11 months ago
Variational capacitance modeling using orthogonal polynomial method
In this paper, we propose a novel statistical capacitance extraction method for interconnects considering process variations. The new method, called statCap, is based on the spect...
Jian Cui, Gengsheng Chen, Ruijing Shen, Sheldon X....
GLVLSI
2008
IEEE
117views VLSI» more  GLVLSI 2008»
13 years 11 months ago
Delay driven AIG restructuring using slack budget management
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown
GLVLSI
2008
IEEE
120views VLSI» more  GLVLSI 2008»
13 years 11 months ago
SAT-based equivalence checking of threshold logic designs for nanotechnologies
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
Yexin Zheng, Michael S. Hsiao, Chao Huang
GLVLSI
2008
IEEE
204views VLSI» more  GLVLSI 2008»
13 years 11 months ago
NBTI resilient circuits using adaptive body biasing
Reliability has become a practical concern in today’s VLSI design with advanced technologies. In-situ sensors have been proposed for reliability monitoring to provide advance wa...
Zhenyu Qi, Mircea R. Stan
SBCCI
2009
ACM
145views VLSI» more  SBCCI 2009»
13 years 11 months ago
Pipelined successive approximation conversion (PSAC) with error correction for a CMOS ophthalmic sensor
The purpose of this work is the proposal of a 10-Bit / 1 MSPS Analog to Digital Converter (ADC) with error correction to match the requirements of a CMOS wavefront sensor for opht...
Frank Sill, Davies W. de Lima Monteiro
SBCCI
2009
ACM
188views VLSI» more  SBCCI 2009»
13 years 11 months ago
Low-power inter-core communication through cache partitioning in embedded multiprocessors
We present an application-driven customization methodology for energy-efficient inter-core communication in embedded multiprocessors. The methodology leverages configurable cach...
Chenjie Yu, Xiangrong Zhou, Peter Petrov
SBCCI
2009
ACM
117views VLSI» more  SBCCI 2009»
13 years 11 months ago
On the energy-efficiency of software transactional memory
Felipe Klein, Alexandro Baldassin, Guido Araujo, P...
GLVLSI
2009
IEEE
132views VLSI» more  GLVLSI 2009»
13 years 11 months ago
Multicast routing with dynamic packet fragmentation
Networks-on-Chip (NoCs) become a critical design factor as chip multiprocessors (CMPs) and systems on a chip (SoCs) scale up with technology. With fundamental benefits of high ban...
Young Hoon Kang, Jeff Sondeen, Jeffrey T. Draper
GLVLSI
2009
IEEE
142views VLSI» more  GLVLSI 2009»
13 years 11 months ago
Hardware-accelerated gradient noise for graphics
A synthetic noise function is a key component of most computer graphics rendering systems. This pseudo-random noise function is used to create a wide variety of natural looking te...
Josef B. Spjut, Andrew E. Kensler, Erik Brunvand
GLVLSI
2009
IEEE
155views VLSI» more  GLVLSI 2009»
13 years 11 months ago
Buffer design and optimization for lut-based structured ASIC design styles
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
Po-Yang Hsu, Shu-Ting Lee, Fu-Wei Chen, Yi-Yu Liu