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    DAC
    2005
    ACM
    127views Computer Architecture» more  DAC 2005»
    Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
    13 years 6 months ago
    Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
    Download  www.cecs.uci.edu
    Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
    Feng Gao, John P. Hayes
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