AES
2000
Springer
13 years 8 months ago
2000
Springer
We compare the five candidates for the Advanced Encryption Standard based on their performance on the Alpha 21264, a 64-bit superscalar processor. There are several new features o...
MMMACNS
2001
Springer
13 years 8 months ago
2001
Springer
We examine diffusion properties of Rijndael which has been selected by US National Institute of Standards and Technology (NIST) for the proposed Advanced Encryption Standard (AES)....
ASIACRYPT
2001
Springer
13 years 8 months ago
2001
Springer
The Advanced Encryption Standard (AES) provides three levels of security: 128, 192, and 256 bits. Given a desired level of security for the AES, this paper discusses matching publi...
AES
2004
Springer
13 years 9 months ago
2004
Springer
Abstract. Since being officially selected as the new Advanced Encryption Standard (AES), Rijndael has continued to receive great attention and has had its security continuously eva...
CHES
2005
Springer
13 years 10 months ago
2005
Springer
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
CHES
2005
Springer
13 years 10 months ago
2005
Springer
A key step in the Advanced Encryption Standard (AES) algorithm is the “S-box.” Many implementations of AES have been proposed, for various goals, that effect the S-box in vari...
DSD
2006
IEEE
13 years 10 months ago
2006
IEEE
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption h...
CHES
2007
Springer
13 years 10 months ago
2007
Springer
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...
AFRICACRYPT
2008
Springer
13 years 10 months ago
2008
Springer
Abstract. This paper presents an updated implementation of the Advanced Encryption Standard (AES) on the recent Xilinx Virtex-5 FPGAs. We show how a modified slice structure in th...