ASYNC
1999
IEEE
13 years 9 months ago
1999
IEEE
Relative Timing is introduced as an informal method for aggressive asynchronous design. It is demonstrated on three example circuits (C-Element, FIFO, and RAPPID Tag Unit), facili...
ASYNC
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper describes an investigation of potential advantages and risks of applying an aggressive asynchronous design methodology to Intel Architecture. RAPPID ("Revolving As...