Sciweavers

    ISCAS
    2003
    IEEE
    103views Hardware» more  ISCAS 2003»
    A massively scaleable decoder architecture for low-density parity-check codes
    13 years 10 months ago
    A massively scaleable decoder architecture for low-density parity-check codes
    Download  eref.uqu.edu.sa
    A massively scalable architecture for decoding low-density parity-check codes is presented in this paper. This novel architecture uses hardware scaling and memory partitioning to ...
    Anand Selvarathinam, Gwan Choi, Krishna Narayanan,...
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.