Sciweavers

CVIU
2007
107views more  CVIU 2007»
13 years 4 months ago
Robot-vision architecture for real-time 6-DOF object localization
This paper presents a new robot-vision system architecture for real-time moving object localization. The 6-DOF (3 translation and 3 rotation) motion of the objects is detected and...
Yasushi Sumi, Yutaka Ishiyama, Fumiaki Tomita
ISCA
2006
IEEE
92views Hardware» more  ISCA 2006»
13 years 4 months ago
Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The res...
Darshan D. Thaker, Tzvetan S. Metodi, Andrew W. Cr...
ISCA
2006
IEEE
130views Hardware» more  ISCA 2006»
13 years 4 months ago
Area-Performance Trade-offs in Tiled Dataflow Architectures
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
Steven Swanson, Andrew Putnam, Martha Mercaldi, Ke...
ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
13 years 4 months ago
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
JCP
2008
120views more  JCP 2008»
13 years 4 months ago
High Throughput VLSI Architecture for Blackman Windowing in Real Time Spectral Analysis
This paper presents a high throughput VLSI architecture for Blackman windowing. Since most of the implementation of windowing functions for real time applications, are based on eit...
Kailash Chandra Ray, A. S. Dhar
ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
13 years 4 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
CCR
2007
104views more  CCR 2007»
13 years 4 months ago
Internet clean-slate design: what and why?
Many believe that it is impossible to resolve the challenges facing today’s Internet without rethinking the fundamental assumptions and design decisions underlying its current a...
Anja Feldmann
CCR
2007
92views more  CCR 2007»
13 years 4 months ago
How to lease the internet in your spare time
Today’s Internet Service Providers (ISPs) serve two roles: managing their network infrastructure and providing (arguably limited) services to end users. We argue that coupling t...
Nick Feamster, Lixin Gao, Jennifer Rexford
IJHPCN
2008
75views more  IJHPCN 2008»
13 years 4 months ago
A hybrid connector for efficient web servers
: In this paper we introduce a novel web server architecture that combines the best aspects of both the multithreaded and the event-driven architectures, the two major existing alt...
David Carrera, Vicenç Beltran, Jordi Torres...
ENTCS
2006
161views more  ENTCS 2006»
13 years 4 months ago
Architecture Normalization for Component-based Systems
Being able to systematically change the original architecture of a component-based system to a desired target architecture without changing the set of functional requirements of t...
Lian Wen, R. Geoff Dromey